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Think Through a Bottleneck: Hourglass Reasoning for Rigorous Induction

Huan Zhu 2026-07-16

The problem is that self-refinement fails to improve few-shot inductive reasoning in large language models because simply prompting explicit rule verbalization is ineffective. The method introduces Hourglass reasoning, which enforces strict context isolation between stages, using a frozen LLM as a meta-constructor to pass only a compressed symbolic state (schema φ and rule T) across stage boundaries. Experimental evidence shows Hourglass raises ARC-AGI-2 best-of-5 accuracy by up to 14 points, nearly doubles GPT-5.5 Verilog synthesis accuracy on ChipBench from 31% to 58%, and reverses the harmful effect of explicit verbalization on BBEH-Linguini with Gemini 3.1 Pro. This matters because it demonstrates that the structural flow of information through isolated reasoning stages, not the language used, drives rigorous inductive reasoning in frozen LLMs.

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HybridQC: Hardware-Grounded Simulation of Tightly Integrated Hybrid Quantum-Classical Systems

Panayiotis Christou, Shuwen Kan, Ying Mao 2026-07-16

HybridQC addresses the problem that hybrid quantum-classical system performance is increasingly limited by classical control and communication, not quantum execution, and that existing tools fail to capture system-topology issues like controller bottlenecks and resource contention. The method introduces a topology-aware discrete-event simulator that models hybrid compute units as configurable graphs of classical and quantum devices, decomposes jobs into typed directed acyclic graphs, and supports interchangeable scheduling policies. Calibrated against live D-Wave and IBM processors, HybridQC achieves mean absolute percentage errors of 3.92%-8.04% for D-Wave QPU access time and 5.26%-19.01% for IBM quantum-seconds, and workload experiments show that balanced 10x HCU scaling improves makespan by only 2.19x-3.42x while scheduling policy changes shift makespan by up to 1.80x. This matters because HybridQC provides a systematic framework to evaluate topology, scheduling, and scaling limits of hybrid architectures before physical deployment, enabling researchers to identify bottlenecks and optimize resource allocation.

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