Microflow: Microarchitectural Causal Observability for Deep Cross-Layer Analysis and Optimization

The problem is that existing architectural simulators expose aggregate metrics or raw traces but fail to reveal complex interactions among microarchitectural events and their relationship to program execution. Microflow introduces an observability framework that transforms execution traces into the Microflow Intermediate Representation (MFIR), explicitly capturing dependencies across software semantics, instructions, microarchitectural events, and hardware resources. On two SPEC CPU 2017 benchmarks, Microflow uncovers bottlenecks invisible from aggregate symptoms, such as hidden misprediction costs in leela and cross-loop-iteration contention in mcf. This matters because making causality queryable provides a strong foundation for performance analysis and hardware-software co-design, enabling systematic reasoning about complex interactions opaque to existing tools.