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StreamingQEC: Streaming Quantum Error Correction in Tightly Integrated Quantum-Classical Systems via Certified Recurrence

Panayiotis Christou, Shuwen Kan, Hao Wang, Ying Mao 2026-07-18

StreamingQEC addresses the problem of modeling resource contention in tightly integrated quantum-classical systems during fault-tolerant quantum error correction (QEC). The method introduces a system-level simulator with explicit discrete-event simulation, an automatic staged-fluid mode for faster exploration, and a certified recurrence mechanism that compresses repeated transitions. Experimental evidence shows recurrence achieves a 24.0x host-side speedup while preserving 59,743,936 decoding events for a 16-job anchor workload, and the staged-fluid mode yields a mean makespan error of 2.60%. This matters because it enables system architects to evaluate QEC pipeline resource contention and scaling, revealing transfer-limited resource matching and decoder-driven pipeline stalls under microsecond-scale cycles.

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HybridQC: Hardware-Grounded Simulation of Tightly Integrated Hybrid Quantum-Classical Systems

Panayiotis Christou, Shuwen Kan, Ying Mao 2026-07-18

HybridQC addresses the problem that hybrid quantum-classical system performance is increasingly limited by classical control and communication, not quantum execution, and existing tools ignore system-topology issues like controller bottlenecks. The method introduces a topology-aware discrete-event simulator that models hybrid compute units as configurable graphs of classical and quantum devices, decomposing jobs into typed directed acyclic graphs executed under interchangeable scheduling policies. Experimental evidence shows the simulator achieves mean absolute percentage errors of 3.92%-8.04% for D-Wave QPU access time and 5.26%-19.01% for IBM quantum-seconds, and reveals that balanced 10x HCU scaling improves makespan by only 2.19x-3.42x while scheduling shifts makespan by up to 1.80x. This matters because HybridQC provides a systematic framework to evaluate topology, scheduling, and scaling limits of hybrid architectures before physical deployment, enabling researchers to identify bottlenecks and optimize resource contention.

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