Filtered by: Cache × Clear all

CODA: Algorithm-Hardware Co-design for Edge Video Diffusion via NMP-Enabled Compute-Cache Operator Disaggregation

Yuanpeng Zhang, YuXuan Wu, Yitong Xiao, Chenhao Xue 2026-07-18

The problem is that deploying Video Diffusion Models on edge devices is too slow for practical local inference due to iterative Transformer-based denoising. The method, CODA, uses algorithm-hardware co-design to disaggregate compute and cache operators via a DIMM-side near-memory engine, reorganizing cache activity into coalesced segments and overlapping compute with cache execution. Experimental evidence shows CODA achieves up to 1.80x end-to-end speedup and 1.74x higher energy efficiency while preserving generation quality. This matters because it enables practical, privacy-preserving video generation on memory-constrained edge GPUs by overcoming the communication and serialization bottlenecks of Cross-Timestep Caching.

PDF